Every chip that guards a secret — a smart card PIN, a device firmware lock, a cryptographic key — relies on one thing: the assumption that its instructions execute exactly as written. Fault-injection attacks shatter that assumption by bending the physics the chip runs on.
The technique is deceptively simple. An attacker pulses the supply voltage for a few nanoseconds, slows or speeds the clock for a single cycle, or fires a laser at a specific transistor. Any of these glitches can corrupt an instruction mid-flight, skip a branch, flip a bit in a register — and if the timing is right, the corrupted instruction happens to be the one that checks your PIN.
The chip does not know it was tampered with. It just skips the comparison, decides the check passed, and grants access. No secret was ever read directly; the attacker simply changed when and whether the check ran.
The countermeasure is equally elegant: run the critical check twice with independent hardware paths. If the two results disagree, something physical went wrong — abort and lock the device. This redundancy is the core of fault-tolerant security design, echoing the same ideas behind error-correcting codes and algorithm verification.
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